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Processors

Discussion in 'A+' started by Andre, Aug 1, 2004.

  1. Andre

    Andre Nibble Poster

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    How much do I have to know about processors? Do I really need to know how much cache L1 or 2 has got pentium celeron or other ?
     
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  2. Phoenix
    Honorary Member

    Phoenix 53656e696f7220 4d6f64

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    to be honest thats really not knowing alot about the processors, infact its the fundemental difference between a celeron and a P4

    its not like you need to know the processors, cache size, die, instruction set and socket type for every processor since the 1980s
     
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  3. SimonV

    SimonV Petabyte Poster Administrator

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    I would say you need to have a good idea of the different processor types and architectures such as knowing what ZIF, PGA, FCPGA and the like stand for and what they mean. Knowing a little about the CPU sockets would also help. You don't really need to know every little detail about CPU's just the basics and some of the history.
     
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  4. mufftak

    mufftak Nibble Poster

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    I had one of these questions on my exam..... what level 2 cache for a ???? processor.
     
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  5. noelg24

    noelg24 Terabyte Poster

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    Isnt the L2 cache for P4 CPUs at about 256 or 512KB? Or are the HT ones at about 1MB? and I think AMD are at 256 and 512KB too. but then I have yet to do the exam so I am just guessing here guys.
     
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  6. noelg24

    noelg24 Terabyte Poster

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    Damn I am good...just checked on ebuyer and I was right. The newer P4s are 1MB L2 and AMD are 256-512KB. :D I take it no one likes a smarty pants then eh? :dry
     
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  7. Phoenix
    Honorary Member

    Phoenix 53656e696f7220 4d6f64

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    Prescotts are 1MB
    Xeons are 512k, 1MB, 2MB
    Itaniums are 1MB, 2MB, 4MB, 8MB
    Northwoods are 512KB
    Celerons are 128KB (poss 256 on newer ones 0 onboard on older ones)
    Pentium IIIs had 512KB (half speed)
    Pentium 2s had 512KB (half speed)

    Durons are 256KB
    Athlons Thunderbirds are 256KB
    Athlon Bartons are 512KB
    AMD 64s are 512KB

    incedentally
    486 DX processors had no onboard L2 cache, it was installed on the mobo (ranging from 0 to 256kb) and had 8kb of level 1 cache
     
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  8. SimonV

    SimonV Petabyte Poster Administrator

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    What was the name of the socket used for that? Was is COS, COST or COAS or something along those lines? Got me thinking now :blink
     
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  9. Phoenix
    Honorary Member

    Phoenix 53656e696f7220 4d6f64

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    err not sure of your wording Si

    the 486 generation spanned 3 sockets
    all were of type PGA

    Socket 1
    17x17 pins, 3 rows
    5v

    Socket 2
    19x19 pins, 4 rows
    5v

    Socket 3
    19x19 pins, 4 rows
    3.3v, 5v

    none of them were ZIF sockets (Zero Insertion Force)
     
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  10. Phoenix
    Honorary Member

    Phoenix 53656e696f7220 4d6f64

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    my bad
    misunderstood

    your talking about CELP (Cache Enhanced Low Profile or Card Edge Low Profile) sockets that took COAST modules (Cache On A STick)
     
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  11. SimonV

    SimonV Petabyte Poster Administrator

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    Thats what I was thinking, thats set my mind striaght. Thanks. :biggrin
     
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  12. flex22

    flex22 Gigabyte Poster

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    I'm sure I can devise a technique for remembering all of this easily.

    Will have a think when I get home.

    Stay tuned..................
     
  13. tripwire45
    Honorary Member

    tripwire45 Zettabyte Poster

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    The irony is that you may get very few processor type questions but it helps to be a bit over prepared for the exam since it's all fair game.
     
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  14. Flamehearted

    Flamehearted Nibble Poster

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    Hiy all,

    I'm on this chapter in the Meyers book and wondering the same thing as the topic creator.

    Do you need to learn the complete specs for every processor he lists in the book ? :(

    For example should I learn the external speed, internal speed, slot type, l1, l2 and the multiplier + generation number ? This seems a lot to remember for all those processors.....

    Also can anybody tell me what the "modes" are that processors can run in ? Theres a question about it at the end of the chapter but as far as I can see no coverage of it in the chapter itself.

    Thanks all !
     
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