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Parity Bits.

Discussion in 'Software' started by xoq100, Jan 16, 2007.

  1. xoq100

    xoq100 Bit Poster

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    Hi everone,

    I'm getting a little stuck with Pariry Bits for SIMM RAM.

    I'll quote what what the book says, for some reason it's confusing the sh*t out of me.

    I'm really struggling to understand this function. Is it possible for someone to explain this a little simplier? I had a look around on Google but most of the examples were even harder to follow than in the book. I just don't understand what might happend to the bits? And how the parity finds out whats happened. Its just not making any sense. The rest of the RAM section for A+ goes in OK, but this isn't getting through to me. :(

    Any help appreiciated, as always. :)

    Hal.
     
  2. supag33k

    supag33k Kilobyte Poster

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    Basically the parity or check bit on a RAM chip was set by earlier types of RAM as an additonal check for wrting data into the RAM chip during memory access.

    This process was derived from theorectical binary mathematical work where if you set a check bit against every piece of data sent to a parity RAM chip - you could determine in fact if the data temporarily residing in the RAM had altered in any way.

    From what I remeber of this process...the tally of bits was odd and the check bit was set - so if the tally of bits was even at the next memory access cycle for the RAM with the check bit set then a halt error resulted.

    The main disadvantage was it was so slow...and modern ram now offers additional checks via ECC to allow for this problem besides.

    hth

    supag33k
     
    Certifications: MCSE (NT4/2000/2003/Messaging), MCDBA
    WIP: CCNA, MCTS SQL, Exchange & Security stuff
  3. xoq100

    xoq100 Bit Poster

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    Thanks mate, thats made it alot clearer, I can read the rest now without scratching my head! :blink

    +rep to you. :D

    Hal.
     
  4. hbroomhall

    hbroomhall Petabyte Poster Gold Member

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    In fact the parity idea goes back even further.

    Early comms links used "7 bit plus parity" for the bytes sent and received. If 'even parity' was used then the sender set the parity bit to make sure there was an even number of '1' bits in the byte. The receiver checked that this was still true and flagged it as an error if not. i.e. exactly the same system.

    While noise on the line would account for errors in tranmitted characters it isn't so obvious why memory would corrupt data.

    The main reasons for corruption are 1) a faulty memory cell, 2) poor power supply, 3) the refresh system glitching and 4) radiation.

    Harry.
     
    Certifications: ECDL A+ Network+ i-Net+
    WIP: Server+
  5. supag33k

    supag33k Kilobyte Poster

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    Yes it does! - some fine extra explanation here!
     
    Certifications: MCSE (NT4/2000/2003/Messaging), MCDBA
    WIP: CCNA, MCTS SQL, Exchange & Security stuff
  6. xoq100

    xoq100 Bit Poster

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    This forum is fantastic, so much knowledge getting thrown left right and center! I absolutly love it! :D

    Thanks Harry!

    Hal.
     

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